Job Description

Job Title: ASIC Power Design Engineer V
Duration: 06 Months (Potential for extension)
Location: Sunnyvale, CA, 94089
Duties:

• ASIC Power Engineer to perform power analysis and optimizations in ASIC for client s AR/VR products. Areas of interests includes Machine Learning. Primary languages are Python, tcl and System Verilog.

Must-Have Skills:

• Experience with Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules)
• Should know how to use Python, Perl (or similar) scripting and data-post-processing tools
• Experience in low power design, tools and methodologies including power intent UPF specifications
• Silicon Power Characterization

Nice-to-have Skills:

• Some power profiling experience at IP/SoC level
• Experience with Silicon Power Characterization
• Experience with Data analytics and visualization

Years of Experience:

• 10+ Years of experience as an ASIC Power engineer, or CAD Engineer/Physical Design engineer

Degrees/Certifications Required:

• BS in Electrical Engineering/Computer Science or equivalent experience

Responsibilities:

• Perform PPA optimization with Fusion compiler.
• Perform RTL and netlist level Power analysis
• Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction
• Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing)
• Implement some blocks at RTL and UPF
• Ability to document and communicate clearly

Minimum Qualifications:

• 10+ Years of experience as an ASIC Power engineer, or CAD Engineer/Physical Design engineer
• Experience with power estimation tools and synthesis, some physical design
• Knowledge of power trade-offs in design and back-end implementation
• Hands-on experience in scripting, data analysis
• BS in Electrical Engineering/Computer Science or equivalent experience

Preferred Qualifications:

• Synopsys (DC, ICC, PTPX/Prime Power, VCS, Verdi) and/or Cadence (Joules)
• Python, Perl (or similar) scripting and data-post-processing tools
• Excel (or MATLAB) for model fitting, data visualization and analysis
• Experience in low power design, tools and methodologies including power intent UPF specifications
• Silicon Power Characterization
• Some power profiling experience at IP/SoC level

What makes this role interesting:

• Designing the most advanced chips for AR/VR devices, client owns the major market for VR devices, there is a lot of opportunities to learn on how to build chips for AR/VR products

Value added or experience gained:

• You will learn on how to build a chip and how to collaborate with software and hardware folks.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

• Dice Id: 10119021
• Position Id: 8536736

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